By Topic

Block-based multi-period refresh for energy efficient dynamic memory

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Joohee Kim ; Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA ; Papaefthymiou, M.C.

Conventional DRAMs use a single refresh period determined by the cell with the largest leakage. This approach is simple but dissipative, because it forces unnecessary refreshes for the majority of the cells with small leakage. In this paper we investigate a novel scheme that relies on multiple refresh periods and small refresh blocks to reduce DRAM dissipation by decreasing the number of cells refreshed too often. Long periods are used to accommodate cells with small leakage. In contrast to conventional row-based refresh, small refresh blocks are used to increase worst-case data retention times. Retention times are further extended by adding a swap cell to each refresh block. We give a novel polynomial-time algorithm for computing an optimal set of refresh periods for block-based multiperiod refresh. Specifically, given an integer K and a distribution of data retention times, in O(KN2) steps our algorithm computes K refresh periods that minimize DRAM dissipation, where N is the number of refresh blocks in the memory. We describe and evaluate a possible implementation of our refresh scheme. In simulations with a 16 Mb DRAM, block-based multi-rate refresh reduces standby dissipation by a multiplicative factor of 4 with area overhead below 6%

Published in:

ASIC/SOC Conference, 2001. Proceedings. 14th Annual IEEE International

Date of Conference: