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Low-power constant-coefficient multiplier generator

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3 Author(s)
Cheng-Yu Pai ; Concordia Univ., Montreal, Que., Canada ; Al-Khalili, A.J. ; Lynch, W.E.

Constant-coefficient multipliers are used in many DSP cores. A new low-power constant multiplier, with detailed design procedure, is presented. A generator written in C++ is used to generate technology-independent VHDL code of the constant multiplier for different input specifications (signed/unsigned, word length, etc.). Synthesis results indicate the new design features less power and area consumption while offering similar speed performance when compared with other general-purpose multipliers

Published in:

ASIC/SOC Conference, 2001. Proceedings. 14th Annual IEEE International

Date of Conference:

2001