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Mismatch analysis and direct yield optimization by spec-wise linearization and feasibility-guided search

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6 Author(s)
Schenkel, F. ; Inst. for Electron. Design Autom., Tech. Univ. Munchen, Germany ; Pronath, M. ; Zizala, S. ; Schwencker, R.
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We present a new method for mismatch analysis and automatic yield optimization of analog integrated circuits with respect to global, local and operational tolerances. Effectiveness and efficiency of yield estimation and optimization are guaranteed by consideration of feasibility regions and by performance linearization at worst-case points. The proposed methods were successfully applied to two example circuits for an industrial fabrication process.

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Design Automation Conference, 2001. Proceedings

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