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Random limited-scan to improve random pattern testing of scan circuits

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1 Author(s)
I. Pomeranz ; Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA

We propose a method of random pattern generation for at-speed testing of circuits with scan. The proposed method uses limited scan operations to achieve complete fault coverage. Under a limited scan operation, the circuit state is shifted by a number of positions which may be smaller than the number of state variables. Limited scan operations are inserted randomly to ensure that the complete test set can be generated by a random pattern generator with simple control logic.

Published in:

Design Automation Conference, 2001. Proceedings

Date of Conference:

22-22 June 2001