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A fully-integrated CMOS frequency synthesizer with charge-averaging charge pump and dual-path loop filter for PCS- and cellular-CDMA wireless systems

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8 Author(s)
Yido Koo ; Sch. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., South Korea ; Hyungki Huh ; Yongsik Cho ; Jeongwoo Lee
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This paper presents the design of a fully-integrated CMOS frequency synthesizer for PCS- and cellular-CDMA wireless systems. The proposed charge-averaging charge pump scheme suppresses fractional spurs and the VCO combined with coarse tuning improves phase noise characteristics. The improved architecture of the dual-path loop filter makes it possible to implement a large time constant on a chip. Fabricated in 0.35-/spl mu/m CMOS technology, this circuit provides 10 kHz channel spacing with phase noise of -106 dBc/Hz at 100 kHz offset. Power dissipation is 60 mW with 3.0 V supply.

Published in:

VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on

Date of Conference:

14-16 June 2001