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Robustness of sub-70 nm dynamic circuits: analytical techniques and scaling trends

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4 Author(s)
Anders, M. ; Circuit Res. Lab., Intel Corp., Hillsboro, OR, USA ; Krishnamurthy, R. ; Spotten, R. ; Soumyanath, K.

We present an accurate (to within 3%, across two process generations), three parameter, closed form, time-domain technique for evaluating the noise response of domino circuits. We evaluate the robustness of scaled topologies to show that conventional domino circuits will cease to be useful around the 70 nm generation. The paper concludes with possible device/circuit approaches to extend domino circuit usefulness.

Published in:

VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on

Date of Conference:

14-16 June 2001

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