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Long unsigned number systolic serial multipliers and squarers

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3 Author(s)
Pekmestzi, K.Z. ; Dept. of Electr. & Comput. Eng., Nat. Tech. Univ. of Athens, Greece ; Kalivas, P. ; Moshopoulos, N.

A systolic serial multiplier and a squarer for unsigned numbers which operate without zero words inserted between successive data words, output the full product, and have only one clock cycle latency-are presented. The multiplier is based on a modified serial/parallel scheme that operates with 100% efficiency. The systolic form is obtained by merging two adjacent multiplier cells. The same technique is used for the design of a serial squarer. The systolisity and the continuous operation are achieved without an increase in hardware complexity. The proposed schemes are well suited for long number multiplication and squaring

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Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on  (Volume:48 ,  Issue: 3 )