Referenced Items are not available for this document.
A Distributed Globally Replaceable Redundancy (DGR) scheme has been developed, which realizes a higher optimization of trade-off between yield and chip size. A newly developed yield simulator has demonstrated the effectiveness of the DGR scheme.
Published in:
VLSI Circuits, 1993. Digest of Technical Papers. 1993 Symposium on
Date of Conference: 19-21 May 1993
- Page(s):
- 101 - 102
- INSPEC Accession Number:
- 4764488
- Conference Location :
- Kyoto, Japan
- Digital Object Identifier :
- 10.1109/VLSIC.1993.920561
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