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There will always be chips designed with the highly manual approaches required to extract the utmost in performance. However, unless the market for a chip is well into the hundreds of millions of dollars, this approach may not be economically justified. A better approach for the vast majority of chip designs is to start with a methodology with proven high productivity, and carefully examine extensions to that methodology which can be added in order to meet performance, area or power objectives. If new capabilities are added in a way which does not break major design tools, technology utilization can be brought from what ASICs achieve to near that of the leading edge full-custom designs, while at the same time having a controlled impact on design productivity. On the other hand, if the approach starts with highly optimized manual circuits and a lack of discipline with respect to tool compatibility, poor productivity is certain to result.