Referenced Items are not available for this document.
A new top gate polysilicon thin-film transistor (TFT) architecture is introduced which requires only a single laser process step to simultaneously crystallize the channel and activate the source-drain. The dummy-gate TFT (DGTFT) uses a light blocking layer patterned with the gate mask combined with two backside expose steps to allow a self-aligned device structure. N-channel TFTs fabricated using the new process have field effect mobilities greater than 100 cm/sup 2//Vs. By controlling the backside exposures it is also possible to form offset or graded doping structures to reduce field enhanced leakage currents.
Published in:
Electron Device Letters, IEEE
(Volume:22
,
Issue:
2
)
Date of Publication: Feb. 2001
- Page(s):
- 86 - 88
- ISSN :
- 0741-3106
- INSPEC Accession Number:
- 6855943
- Digital Object Identifier :
- 10.1109/55.902840
- Date of Current Version :
- 07 August 2002
- Issue Date :
- Feb. 2001
- Sponsored by :
- IEEE Electron Devices Society
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