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Extending resolution limits of IC fabrication technology: demonstration by device fabrication and circuit performance

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6 Author(s)
O. Nalamasu ; Lucent Technol. Bell Labs., Murray Hill, NJ, USA ; G. P. Watson ; R. A. Cirelli ; J. Bude
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Summary form only given, as follows. To continue the trend of increased functionality in IC devices at a reduced cost, it is imperative that robust new fabrication technologies be invented, innovated and implemented for reducing device features. As device dimensions shrink, new materials and technologies are developed, and methods have been invented to extend the resolution capability of the existing tool infrastructure. This talk will give an overview of challenges in IC fabrication and specifically illustrate how these challenges have been successfully met using lithography and gate etch as examples. Using existing optical lithography and etch tools, a fully functional 2.7 million transistor DSP with 120 nm gates has been fabricated. Additionally, a nonvolatile memory device of 60 nm gate dimensions has also been fabricated with further refinements in process and using advanced lithographic techniques. These results and future trends will be detailed

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VLSI Design, 2001. Fourteenth International Conference on

Date of Conference: