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Bitmapped yield enhancement solutions: a case study of escalating yield

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3 Author(s)
Jacobson, L. ; Nat. Semicond., USA ; Crain, D. ; Joyce, C.

National Semiconductor has an ongoing commitment to its customers to provide rapid product development, comprehensive cycles of learning, and world class yields. Through the development of systems which move bitmapping from engineering tools requiring massive effort to maintain and run, to the highly automated arena of manufacturing, a much finer partitioning of yield, and a more effective deployment of yield enhancement resources may result. Tying in a vast optical and SEM review infrastructure allows for extremely rapid feedback for inline detectable anomalies, including optical and SEM images for each inspected lot. Bitmapping as the framework for rapid failure analysis provides the accuracy needed to rapidly identify and assign root cause to failures not found with inline inspection tools. Development of the highly integrated and automated bitmapping system at National Semiconductor has enabled extremely rapid yield learning rates and is a key component in the ability to maintain world class yields with leading edge technologies. Looking forward, bitmapping will accelerate yield learning, and hold an important role in process development as we bring feature sizes of 0.13u and below into high volume manufacturing

Published in:

Advanced Semiconductor Manufacturing Conference and Workshop, 2000 IEEE/SEMI

Date of Conference:

2000