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A quasi-two dimensional model for fully depleted single gate SOI MOSFETS including temperature effects

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1 Author(s)
R. Gharabagi ; Dept. of Electr. Eng., St. Louis Univ., MO, USA

A quasi-two dimensional model for single gate silicon on insulator (SOI) Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) is presented. Major small geometry effects such as carrier velocity saturation, mobility degradation due to normal field, channel length modulation, and drain induced barrier lowering are included. The effects of parasitic bipolar transistor, impact ionization, and device self heating due to low thermal conductivity of buried oxide layer is also included. The device carrier mobility and threshold voltage are modeled as function of temperature. The effects of source, drain, and channel resistances are considered. Modeled results are then compared to measured data and are shown to be in good agreement over a wide range of operating voltages

Published in:

National Aerospace and Electronics Conference, 2000. NAECON 2000. Proceedings of the IEEE 2000

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