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Comparison of defect detection capabilities of current-based and voltage-based test methods

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1 Author(s)
Kruseman, B. ; Philips Res. Lab., Eindhoven, Netherlands

The industrial default to test random logic is based on stuck-at fault test patterns applied via scan-chains. This test-method can be described as static voltage testing. A second well-known method is IDDQ resting, which can be described as static current testing. This second method is especially suited for detecting resistive shorts. For deep sub-micron technologies new defect mechanisms start to become important. Especially, opens are a much feared type of defect since static test methods are less suited to detect these defects. Dynamic test methods such as delay-fault testing and transient current testing could fill this gap in the test suite. The paper gives an overview of the aforementioned test-methods including some of the new current-based test methods necessary for deep submicron technologies and their defect detection capabilities

Published in:

Test Workshop, 2000. Proceedings. IEEE European

Date of Conference:

2000