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Current testing procedure for deep submicron devices

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3 Author(s)
Chichkov, A. ; Alcatel Microelectron., Oudenaarde, Belgium ; Merlier, D. ; Cox, P.

This paper presents a test technique that employs two different supply voltages for the same IDDQ pattern. The results of the two measurements are subtracted in order to eliminate the inherent subthreshold leakage. Summary of the experiment carried out on a “System on a Chip” (SOC) device build in 0.35 μm technology is also shown. The experiments proved that the method is effective in detecting failures not detectable with the single limit I DDQ

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Test Workshop, 2000. Proceedings. IEEE European

Date of Conference: