This paper starts with an overview of realistic faults models for two-port memories, divided into single-port faults and unique two-port faults. The latter faults can not be detected with the conventional single-port memory tests; they require special tests. Thereafter the paper presents a set of four march tests detecting the unique two-port faults. Three of the tests have a time complexity of θ(n) and one of θ (√n), whereby n is the size of the two-port memory cell array. Two of the four tests have been implemented at Intel and applied to 1500 two-port memories passing all single port tests. The test results show that two dies fail to pass the implemented tests, which means that the tests are superior
Published in:
Memory Technology, Design and Testing, 2000. Records of the 2000 IEEE International Workshop on
Date of Conference: 2000