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Tutorial: synchronous dynamic memory test construction-a field approach

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1 Author(s)
Vollrath, J. ; White Oak Semicond., Sandston, VA, USA

This paper gives an introduction how to construct dynamic memory tests and test flows. Step by step a basic march test is developed choosing a pattern, voltage levels and timings. Starting with this basic pattern, modifications for characterization, diagnostic and speed testing are discussed. These variations are then used to construct a test sequence to ensure functionality according to the data sheet specification

Published in:
Memory Technology, Design and Testing, 2000. Records of the 2000 IEEE International Workshop on

Date of Conference: 2000

Page(s):
59 - 64
Meeting Date :
07 Aug 2000-08 Aug 2000
ISSN :
1087-4852
Print ISBN:
0-7695-0689-5
INSPEC Accession Number:
6727983
Conference Location :
San Jose, CA
Digital Object Identifier :
10.1109/MTDT.2000.868616
Product Type:
Conference Publications

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