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Linearity enhancement techniques for MOSFET-only SC circuits

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3 Author(s)
Leelavattananon, K. ; Dept. of Electr. & Electron. Eng., Imperial Coll. of Sci., Technol. & Med., London, UK ; Toumazou, C. ; Hughes, J.B.

Techniques to enhance the linearity of switched-capacitor circuits utilising MOSFET gate capacitance are presented. Practical aspects limiting accuracy are investigated. With appropriate choice of capacitor technique, all types of switched-capacitor circuit become possible in standard digital CMOS processes. A sample-and-hold amplifier employing the proposed techniques was designed using a standard 0.6 μm digital CMOS process, and verified with simulation results to demonstrate significant linearity enhancement

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Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on  (Volume:5 )

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