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Design methodology for Booth-encoded Montgomery module design for RSA cryptosystem

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2 Author(s)
Jye-Jong Leu ; Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan ; An-Yeu Wu

In this paper, a design methodology for the design of a Montgomery module is proposed. We summarize the result in pseudo C-like codes and call it Booth-encoded Montgomery modular multiplication algorithm. Using this algorithm, iteration number is reduced to about n/2 in each Montgomery operation. In addition, we apply the folding and unfolding techniques to shorten the critical path. Finally, we propose the 4 bit-digit-serial pipelined architecture to process RSA encryption/decryption in a more efficient way. The speed of the proposed algorithm is approximately 1.7 times that of most RSA VLSI designs based on original Montgomery modular multiplication algorithm

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Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on  (Volume:5 )

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