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An evolutionary computing approach to multilevel logic synthesis using various logic operations

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3 Author(s)
Hozumi, T. ; Dept. of Econ. & Inf. Sci., Hyogo Univ., Kakogawa, Japan ; Kakusho, O. ; Yamato, K.

This paper discusses the logic synthesis of multilevel circuits using various operations. We suppose target circuits having no loop back connections and usable any logic function in any part of the multilevel circuits. In this paper, we use MIN, MAX, TSUM and MODSUM functions as functions of logic gates. We minimize the circuit using the Genetic Algorithms. We encode each logic gate to the series of numbers representing a function and its connections and represent the circuit by a chromosome arranging the numbers for all logic gates. We show that our GAs can design a given function with more flexible structures

Published in:

Multiple-Valued Logic, 2000. (ISMVL 2000) Proceedings. 30th IEEE International Symposium on

Date of Conference:

2000