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Synthesis for arithmetic built-in self-test

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1 Author(s)
Stroele, A.P. ; Inst. of Comput. Design & Fault Tolerance, Karlsruhe Univ., Germany

Arithmetic built-in self-test (BIST) is a favorable test method for data paths that include adders, subtracters, and other arithmetic units. With these functional units, accumulator structures are configured to generate test patterns and compact test responses. This paper presents a method to synthesize data paths that are well-suited for arithmetic BIST. The key part of this approach is an assignment procedure that takes into account structural properties which are advantageous for arithmetic BIST. The resulting circuits have the same speed and require about the same area as circuits that have been synthesized without testability considerations

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VLSI Test Symposium, 2000. Proceedings. 18th IEEE

Date of Conference: