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High-speed single error correcting convertor for residue number processing

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2 Author(s)
Zhang, C.N. ; Dept. of Comput. Sci., Regina Univ., Sask., Canada ; Cheng, H.D.

A pipelined systolic design for residue error correction using the Chinese remainder theorem is described which has a higher throughput compared with previous methods and minimum time latency. In addition, the design has the capability of overflow detection and self-diagnostics.

Published in:

Computers and Digital Techniques, IEE Proceedings E  (Volume:138 ,  Issue: 4 )