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A novel fault tolerant approach for SRAM-based FPGAs

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4 Author(s)
Jian Xu ; Fudan Univ., Shanghai, China ; Paifa Si ; Weikang Huang ; Lombardi, Fabrizio

This paper presents a novel fault tolerant approach for SRAM-based FPGAs. The proposed approach includes a fault tolerant architecture and its related routing procedure. In the approach, both the overheads for CLBs and interconnects are considered. The fault tolerant routing procedure under this novel approach is simple and less time-consuming. We provide the simulation results and show that the proposed approach has lower overhead than previous methods found in technical literature

Published in:

Dependable Computing, 1999. Proceedings. 1999 Pacific Rim International Symposium on

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