Cart (Loading....) | Create Account
Close category search window
 

Specification and design of a quasi-delay-insensitive Java card microprocessor

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Fu-Chiung Cheng ; Dept. of Comput. Sci. & Technol., Tatung Univ., Taipei, China ; Chuin-Ren Wang

This paper proposes a very robust microprocessor for Java Card based on asynchronous technology. Data dependency graphs are used to specify the microoperations of instructions of Java Card and then mapped to our quasi-delay-insensitive components. Three optimization schemes are proposed for better performance, less power consumption and/or less logic. Our goal is to design a simple, robust Java Card microprocessor

Published in:

VLSI Design, 2000. Thirteenth International Conference on

Date of Conference:

2000

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.