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Status condition analysis during data path verification of sequential circuits

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1 Author(s)
D. Sarkar ; Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, India

A control path-data path partition based sequential circuit verification scheme can avoid the state explosion problem. Of the two broad tasks involved in data path verification namely, register transfer operation analysis and status condition analysis, the second one is described. The issues addressed are (i) time expended in status detection and (ii) completeness of the analysis function. A status analyzer, based on a simplifying assumption, has been presented

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VLSI Design, 2000. Thirteenth International Conference on

Date of Conference: