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A versatile 3.3/2.5/1.8-V CMOS I/O driver built in a 0.2-μm, 3.5-nm Tox, 1.8-V CMOS technology

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5 Author(s)
H. Sanchez ; Somerset Design Center, Motorola Inc., Austin, TX, USA ; J. Sigel ; C. Nicoletta ; J. P. Nissen
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This I/O driver supports 3.3/2.5/1.8-V interfaces in a 3.5-nm Tox, 1.8-V CMOS technology. A bias generator, its switch capacitors, and a level shifter with protection network guarantee reliability and improve noise rejection. Measured output timing degradation is 2.5 ps per I/O switching. Buried resistors limit variation in output impedance. Interface delay of 2 ns with worst case I/O switching allows 400-MHz operation

Published in:

IEEE Journal of Solid-State Circuits  (Volume:34 ,  Issue: 11 )