Referenced Items are not available for this document.
Concept of future scaling-down for RF CMOS has been investigated in terms of fT, fmax, RF noise, linearity, and matching characteristics, based on simulation and experiments. It has been found that gate width and finger length are the key parameters especially in sub-100 nm gate length generations.
Published in:
VLSI Circuits, 1999. Digest of Technical Papers. 1999 Symposium on
Date of Conference: 17-19 June 1999
- Page(s):
- 165 - 166
- Meeting Date :
- 17 Jun 1999-19 Jun 1999
- Print ISBN:
- 4-930813-95-6
- INSPEC Accession Number:
- 6505371
- Conference Location :
- Kyoto, Japan
- Digital Object Identifier :
- 10.1109/VLSIC.1999.797271
- Product Type:
- Conference Publications
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