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Summary form only given. This work introduces a two-path, sixth-order, switched-capacitor sigma-delta modulator capable of digitizing a 1.25 MHz signal band centered at an IF of 20 MHz. The modulator samples the input at 80 MHz and implements its constituent resonators by chopping the signal at the IF (fs/4). It thus also acts to demodulate the I and Q components of the signal and mix them to baseband. An experimental prototype of the modulator has been integrated in a 0.25 /spl mu/m CMOS technology and provides a dynamic range of 80 dB when operated from a single 2.5 V supply.