Referenced Items are not available for this document.
In this paper, we present a delay-locked loop (DLL) technique for performing a combined symbol and sampling clock synchronization in orthogonal frequency division multiplexing (OFDM) systems. In addition, we propose a symbol timing acquisition algorithm for the DLL. It is shown that by using this combined scheme, we can achieve symbol timing recovery and sampling clock adjustment simultaneously. In particular, the symbol timing estimation error variance can be decreased by several orders of magnitude compared with the common correlation methods in both the AWGN and multipath fading channels
Published in:
Wireless Communications and Networking Conference, 1999. WCNC. 1999 IEEE
Date of Conference: 1999
- Page(s):
- 1153 - 1157 vol.3
- Meeting Date :
- 21 Sep 1999-24 Sep 1999
- ISSN :
- 1525-3511
- Print ISBN:
- 0-7803-5668-3
- INSPEC Accession Number:
- 6536557
- Conference Location :
- New Orleans, LA
- Digital Object Identifier :
- 10.1109/WCNC.1999.796886
- Product Type:
- Conference Publications
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