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Path planning using hardware time delays

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1 Author(s)
Moller, R. ; Dept. of Comput. Sci., Zurich Univ., Switzerland

The computation of shortest paths as a basic task in robotics can be accomplished by graph-searching algorithms. Attempts have been made to accelerate a part of these algorithms-the computation of potential vectors-using fine-grained parallel hardware. As shown in this paper, the complexity of digital path-planning circuits can be enormously reduced, if distances are encoded by hardware time delays

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Robotics and Automation, IEEE Transactions on  (Volume:15 ,  Issue: 3 )