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A self-timed implementation of Boolean functions

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2 Author(s)
Saarepera, M. ; Dept. of Comput. Sci., Tokyo Inst. of Technol., Japan ; Yoneda, T.

In this paper, we discuss Three-Rail coded 2-phase signaling self-timed implementation of Boolean functions by feedback-free gate networks. Delays in operating Three-Rail gates and signals associated with inputs and outputs of gates are assumed to be arbitrary but finite. We implement some Three-Rail gates by binary Boolean gates. In implemented Three-Rail gates we assume isochronic forks or equipotential regions. We show that Three-Rail gates are the smallest gates, such that the feedback-free gate networks are self-timed under 2-phase protocol. Designing Three-Rail feedback-free gate networks is as hard as designing corresponding synchronous feedback-free gate networks

Published in:

Advanced Research in Asynchronous Circuits and Systems, 1999. Proceedings., Fifth International Symposium on

Date of Conference:

1999