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Exploiting conditional instructions in code generation for embedded VLIW processors

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1 Author(s)
Leupers, R. ; Dept. of Comput. Sci., Dortmund Univ., Germany

This paper presents a new code optimization technique for a class of embedded processors. Modern embedded processor architectures show deep instruction pipelines and highly parallel VLIW-like instruction sets. For such architectures, any change in the control flow of a machine program due to a conditional jump may cause a significant code performance penalty. Therefore, the instruction sets of recent VLIW machines offer support for branch-free execution of conditional statements in the form of so-called conditional instructions. Whether an if-then-else statement is implemented by a conditional jump scheme or by conditional instructions has a strong impact on its worst-case execution time. However the optimal selection is difficult particularly for nested conditionals. We present a dynamic programming technique for selecting the fastest implementation for nested if-then-else statements based on estimations. The efficacy is demonstrated for a real-life VLIW DSP.

Published in:

Design, Automation and Test in Europe Conference and Exhibition 1999. Proceedings

Date of Conference:

9-12 March 1999