We describe a high performance clocking methodology for domino pipelines. Our technique maximizes the clock rate of the circular pipeline (“ring”) while maintaining the ring cycle time to be the worst-case combinational logic delay around the ring. It is relatively immune to global clock skew, incurs no latch overhead, allows up to 50% time borrowing, and offers a robust way of preventing race-through problems, adjusted for the worst-case time borrowing
Published in:
Design Automation Conference, 1999. Proceedings of the ASP-DAC '99. Asia and South Pacific
Date of Conference: 18-21 Jan 1999