Scheduled System Maintenance:
On Monday, April 27th, IEEE Xplore will undergo scheduled maintenance from 1:00 PM - 3:00 PM ET (17:00 - 19:00 UTC). No interruption in service is anticipated.
By Topic

Thermal engineering of electronics packages using CVD diamond

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Fabis, P.M. ; Norton Co., Northborough, MA, USA

CVD diamond substrates were: (a) plastic packaged as SOIC GaAs MESFET (chip and wire, flip chip) and PQFP GaAs PHEMT devices, and (b) as CuW-flanged ceramic packaged with Si LDMOS devices. The thermal performance milestones realized for the diamond-enhanced packages were: for GaAs/CVD diamond plastic packages, greater than 50% reductions in junction temperature at rated power, 20 W CW operation uninterrupted for 96 hours; for Si/CVD diamond CuW-flanged ceramic packages, a 65% reduction in junction temperature and a 44% reduction in maximum package temperature. These superior performance figures were achieved in part through the thermal engineering of the dominant thermal transport path from heat source to heat sink. The design, performance, and economic aspects of diamond insertion are discussed for high performance GaAs/CVD diamond and Si/CVD diamond electronic packages

Published in:

Advanced Packaging Materials: Processes, Properties and Interfaces, 1999. Proceedings. International Symposium on

Date of Conference:

14-17 Mar 1999