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Multilevel logic synthesis of symmetric switching functions

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2 Author(s)
B. -G. Kim ; Dept. of Electron. Eng., Choong-Nam Nat. Univ., South Korea ; D. L. Dietmeyer

Designs of totally symmetric functions provided by logic synthesis systems have on average more than twice as many literals as best designs, while the designs of nonsymmetric functions have on average 20% more literals. A simple, but effective, heuristic method for synthesizing symmetric functions that detects and takes advantage of symmetry and is based on classic disjoint decomposition theory is fully developed from basic definitions. Functions are realized as Boolean networks with cost measured as the literal count of factored expressions. Programs based on the method almost always produce the best designs known to the authors. Two strategies for accepting decompositions are explored. They do produce different results in a few cases: examples are presented to show that neither always produces best designs. These programs are proposed as preprocessors for a comprehensive synthesis system

Published in:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  (Volume:10 ,  Issue: 4 )