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An architecture of a matrix-vector multiplier dedicated to video decoding and three-dimensional computer graphics

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4 Author(s)
H. Fujishima ; Dept. of Inf. Syst. Eng., Osaka Univ., Japan ; Y. Takemoto ; T. Onoye ; I. Shirakawa

An architecture of a matrix-vector multiplier (MVM) is devised, which is dedicated to MPEG-4 natural/synthetic video decoding. The MVM can perform the matrix-vector multiplication both in the inverse discrete cosine transform (IDCT) and in the geometrical transformation of three-dimensional computer graphics (3-D CG); or, specifically, it can achieve the multiplication of a 4×4 matrix by a four-tuple vector necessary in the one-dimensional IDCT for eight pixels and in the geometrical transformation for a point in a 3-D space. This paper describes a new architecture of this MVM and also shows the implementation result of a functional module composed of four MVMs with the use of 440-k transistors, which can operate at 20 MHz or less

Published in:

IEEE Transactions on Circuits and Systems for Video Technology  (Volume:9 ,  Issue: 2 )