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A two trillion operations per second miniaturized mixed signal radar receiver/processor

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1 Author(s)
W. S. Song ; Lincoln Lab., MIT, Lexington, MA, USA

A new multi-channel UHF miniaturized mixed-signal radar receiver/processor is being developed for an airborne early warning application. Each MCM-based processor/receiver module consists of a high dynamic range, one-stage down-conversion RF receiver an A/D converter and a high performance radar signal processor. The signal processor performs the digital in-phase/quadrature down-conversion, channel equalization, and pulse compression functions. Approximately 60 billion arithmetic operations per second are performed by each module. The 32 module chassis performs approximately two trillion operations per second in one cubic foot of space. In order to meet the high computational throughput requirement, a 23 billion operations per second custom VLSI signal processor was developed using the bit-level systolic array architecture.

Published in:

Signals, Systems & Computers, 1998. Conference Record of the Thirty-Second Asilomar Conference on  (Volume:2 )

Date of Conference:

1-4 Nov. 1998