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Optimal architectures for massively parallel implementation of hard real-time beamformers

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1 Author(s)
K. P. Watkins ; Appl. Res. Lab., Texas Univ., Austin, TX, USA

This paper reports an experimental analysis of real-time computational architectures applied to digital time delay beamformation. The goal of this research has been to identify the most efficient multiprocessor utilization for a prototypical beamformer by modeling the signal processing and applying selected multiprocessor scheduling algorithms. A synchronous dataflow (SDF) domain model was used to implement the most computationally intense core of the beamformer in Ptolemy. In order to evaluate multiprocessor scheduling performance, four automated scheduling strategies were applied: declustering, a classical list scheduler, dynamic-level scheduler, and a hierarchical scheduler. A manual heuristic schedule was also postulated and evaluated. Several key metrics were applied in judging optimality. It is demonstrated that the hierarchical scheduler holds measurable advantage over the other algorithms considered including the manual method. An analysis of the underlying performance drivers is given.

Published in:

Signals, Systems & Computers, 1998. Conference Record of the Thirty-Second Asilomar Conference on  (Volume:2 )

Date of Conference:

1-4 Nov. 1998