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Residue arithmetic multiplier based on the radix-4 signed-digit multiple-valued arithmetic circuits

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2 Author(s)
S. Wei ; Dept. of Comput. Sci., Gunma Univ., Japan ; K. Shimizu

Residue arithmetic multiplier based on the radix-4 signed-digit arithmetic is presented. Conventional residue arithmetic circuits have been designed using binary number arithmetic system, but the carry propagation arises which limits the speed of arithmetic operations in residue modules. In this paper, two radix-4 signed-digit (SD) number representations, (-2,-1,0,1,2) and (-3,-2,-1,0,1,2,3), are introduced. The former is used for the input and output, and the latter for the inner arithmetic circuit of the presented multiplier. So that, by using integers 4P and 4P±1 as moduli of residue number system (RNS), where p is a positive integer, both the partial product generating circuit and the circuit for sum of the partial products in the multiplier can be efficiently constructed based on the SD number representations. The module m addition, m=4P or m=4 P±1, can be performed by an SD adder or an end-around-carry SD adder with the multiple-valued circuits and the addition time is independent of the word length of operands. The modulo m multiplier can be compactly constructed using a binary modulo m SD adder tree based on the multiple-valued addition circuits, and consequently the module m multiplication is performed in O(log2 p) time

Published in:

VLSI Design, 1999. Proceedings. Twelfth International Conference On

Date of Conference:

7-10 Jan 1999