Stochastic-flash analog-to-digital conversion

Flash-type analog-to-digital converters (ADC's) presenting a nonlinear behavior, i.e., having nonequally spaced threshold levels, may introduce harmonic distortion that can be reduced by employing large-amplitude dither-based conversion techniques. However, large-scale dithering is difficult to implement and, in addition, severely reduces the ADC input dynamic range. In this paper, a new ADC architecture is presented based on ordinary flash conversion and dynamic element matching, that strongly reduces nonlinear distortion. It eliminates the need for large-scale dither signals by randomizing the resistor positions in the resistor string used to generate the voltage references. Some properties of this architecture are analyzed and simulation results that validate the theoretical assumptions are presented.