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Optimal parameters for ΔΣ modulator topologies

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4 Author(s)
A. Marques ; ESAT, Katholieke Univ., Leuven, Belgium ; V. Peluso ; M. S. Steyaert ; W. M. Sansen

A systematic study of single-loop, cascaded, and multibit ΔΣ modulators of second to fourth order is presented, based on a combination of behavioral simulations and linear modeling. Constraints for optimal performance and precise guidelines for the choice of parameters are derived. Moreover, the optimal parameters and the corresponding performance are found and given in tables. A graph showing the maximal achievable performance of each topology as a function of the oversampling ratio is presented, offering a valuable help for the design of analog-to-digital converters

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IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing  (Volume:45 ,  Issue: 9 )