Referenced Items are not available for this document.
This paper presents a proposed scheme for the implementation of a Viterbi decoder. The implementation process is based upon a trace back algorithm for memory management. Computer simulation of the proposed implementation has been carried out for decoding convolutionally coded messages with constraint length k=3 and rate r=1/2 using the Craftsman Xilinx package. Encouraging results were obtained
Published in:
Radio Science Conference, 1998. NRSC '98. Proceedings of the Fifteenth National
Date of Conference: 24-26 Feb 1998
- Page(s):
- C22/1 - C22/8
- Meeting Date :
- 24 Feb 1998-26 Feb 1998
- Print ISBN:
- 0-7803-5121-5
- INSPEC Accession Number:
- 6181327
- Conference Location :
- Cairo
- Digital Object Identifier :
- 10.1109/NRSC.1998.711484
- Product Type:
- Conference Publications
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