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An implementation scheme for a Viterbi decoder

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4 Author(s)
M. A. Aboul-Dahab ; Coll. of Eng. & Technol., Arab Acad. for Sci., Technol. & Maritime Transp., Alexandria, Egypt ; M. F. Ashry ; S. A. Salih ; M. E. Abd-El-Galil

This paper presents a proposed scheme for the implementation of a Viterbi decoder. The implementation process is based upon a trace back algorithm for memory management. Computer simulation of the proposed implementation has been carried out for decoding convolutionally coded messages with constraint length k=3 and rate r=1/2 using the Craftsman Xilinx package. Encouraging results were obtained

Published in:

Radio Science Conference, 1998. NRSC '98. Proceedings of the Fifteenth National

Date of Conference:

24-26 Feb 1998