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The design and simulation of FIFO using self-timed based asynchronous circuit elements

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3 Author(s)
Bahbouh, H.T. ; Fac. of Eng., Cairo Univ., Giza, Egypt ; Ezzat Salama, A. ; Khalil, A.H.

The objective of this paper is to introduce the basic elements utilized in the design of asynchronous circuits. CMOS designs are implemented. The performance of these elements is evaluated using SPICE simulator. FIFO pipelined structure was implemented utilizing self-timed asynchronous elements

Published in:

Radio Science Conference, 1998. NRSC '98. Proceedings of the Fifteenth National

Date of Conference:

24-26 Feb 1998