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Implementing C algorithms in reconfigurable hardware using C2Verilog

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2 Author(s)
Soderman, D. ; CompiLogic Corp., San Jose, CA, USA ; Panchul, Y.

A new full featured ANSI C to synthesizable RTL Verilog compiler, C2Verilog, was used to implement several system-level algorithms in a variety of IC implementations. This paper discusses the results achieved implementing a compression-decompression, a prime number generation, and a sorting algorithm in reconfigurable hardware

Published in:
FPGAs for Custom Computing Machines, 1998. Proceedings. IEEE Symposium on

Date of Conference: 15-17 Apr 1998

Page(s):
339 - 342
Meeting Date :
15 Apr 1998-17 Apr 1998
Print ISBN:
0-8186-8900-5
INSPEC Accession Number:
6035025
Conference Location :
Napa Valley, CA
Digital Object Identifier :
10.1109/FPGA.1998.707944
Product Type:
Conference Publications

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