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Superharmonic injection locking is investigated in a new theoretical approach. Low power frequency dividers are designed using injection locked oscillators with cascode transistors. The Rockwell 0.5 /spl mu/m CMOS process is used to design a 3 mW injection locked frequency divider in the 1800 MHz frequency range. A 200 MHz maximum locking range is achieved in simulations. 2SC3302 Toshiba NPN transistors are also used to build a 1.75 mW injection locked frequency divider in the 800 MHz frequency range to verify the theory.