A description of the signal processing stage of an on-board integrated VLSI multi-carrier demodulator at the demultiplexing level is presented, along with a description of the optimization procedure that has been developed for the signal processing functions. The varying adjacent carrier interference and channel noise distribution are modeled to provide the best performing demultiplexing scheme under the given carrier distribution with minimum complexity
Published in:
Acoustics, Speech and Signal Processing, 1998. Proceedings of the 1998 IEEE International Conference on
(Volume:6
)
Date of Conference: 12-15 May 1998