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Scheduling of mask shop E-beam writers

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1 Author(s)
Yi-Feng Hung ; Dept. of Ind. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan

Reducing wafer fabrication cycle time and providing on-time wafer deliveries are among the top priorities of semiconductor companies. Mask manufacturing is essential to the overall wafer fabrication process since on-time delivery of masks significantly affects wafer fabrication cycle times. Moreover, delivering wafers on time means deliveries of masks must be on time as well. This research studies the scheduling problem of the bottleneck machine-the Electrical Beam (E-beam) Writer-of a mask shop. The criterion of minimum total tardiness is used as our performance measure to schedule this bottleneck operation. Using a predetermined Earliest-Due-Date (EDD) dispatch policy set by management, this study first addresses the problem of scheduling batches of a single mask size on a single machine. The approach is extended to the problem of scheduling batches of two mask sizes on a single machine; finally, a heuristic for a multiple-machine problem is developed. For the problem of a single machine under EDD dispatching policy, the problem can be formulated as a Dynamic Program (DP). Thus, it can be solved for an optimal solution in polynomial time. For the multiple machines problem, we heuristically allocate the masks to each machine. Each machine with allocated masks can then be solved by the DP formulation designed for the single machine problem. Based on the computational experiments in this study, the proposed DP approach reduces total tardiness by an average of 55% from the method currently in use at a major IC manufacturing foundry. Furthermore, in the case that due dates are set realistically, the DP approach reduces the tardiness about 95% from the shop's current method and about 88% from a simple full-batch method of scheduling

Published in:

Semiconductor Manufacturing, IEEE Transactions on  (Volume:11 ,  Issue: 1 )