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Scheduling and module assignment for reducing BIST resources

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3 Author(s)
Parulkar, I. ; Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA ; Gupta, S.K. ; Breuer, M.A.

Built-in self-test (BIST) techniques modify functional hardware to give a data path the capability to test itself. The modification of data path registers into registers (BIST resources) that can generate pseudo-random test patterns and/or compress test responses, incurs an area overhead penalty. We show how scheduling and module assignment in high-level synthesis affect BIST resource requirements of a data path. A scheduling and module assignment procedure is presented that produces schedules which, when used to synthesize data paths, result in a significant reduction in BIST area overhead and hence total area

Published in:

Design, Automation and Test in Europe, 1998., Proceedings

Date of Conference:

23-26 Feb 1998