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20-Bit RISC and DSP System Design in an FPGA

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2 Author(s)
Tomar, A.K.S. ; Lakshmi Narain Coll. of Technol., India ; Jain, R.

These days, most microprocessor and microcontroller designs are based on a Reduced Instruction Set Computer (RISC) core, and many operations - such as discrete cosine transform (DCT), inverse DCT, discrete Fourier transform (DFT), and fast Fourier transform (FFT)--are performed by a digital signal processor (DSP) system. Here, the authors present the design of a RISC and DSP system that uses very high-density logic (VHDL) and a field-programmable gate array (FPGA). This RISC is a 20-bit processor.

Published in:

Computing in Science & Engineering  (Volume:16 ,  Issue: 2 )

Date of Publication:

Mar.-Apr. 2014

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