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Device instability of postannealed TiOx thin-film transistors under gate bias stresses

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4 Author(s)
Du Ahn, Byung ; Department of Electrical and Electronic Engineering, Yonsei University, Seoul 120-749, South Korea ; Ok, Kyung-Chul ; Park, Jin-Seong ; Chung, Kwun-Bum

Your organization might have access to this article on the publisher's site. To check, click on this link:http://dx.doi.org/+10.1116/1.4790572 

This paper investigates the negative bias instability (NBS) and positive bias instability (PBS) of titanium oxide (TiOx) thin-film transistors (TFTs) with different annealing temperatures. Structural analyses suggested that TiOx films annealed at 450 and 550 °C had average grain sizes of 200 and 400 nm, respectively. A TiOx TFT annealed at 550 °C exhibited respective threshold voltage (Vth) shifts of only -1.4 and 10.2 V under NBS and PBS conditions. The origin of the instability was found to be a charge trapping mechanism caused by different grain sizes, boundaries, and changes in band edge states below the conduction band, which acted as electron and hole trap sites.

Published in:
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures  (Volume:31 ,  Issue: 2 )

Date of Publication: Mar 2013

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